Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-ANo. 12 ;
pp. 3238-3247 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: two-level cache, L1/L2, cache optimization, design space exploration, cache simulation, embedded system,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-CNo. 6 ;
pp. 1275-1279 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies) Category: RF Keyword: dual-band GPS receiver, L1/L2, LNA, image-reject mixer, image-rejection ratio (IMRR),