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IEICE Trans

Keyword : H.264 encoding

Multiple Region-of-Interest Based H.264 Encoder with a Detection Architecture in Macroblock Level Pipelining
Tianruo ZHANG Chen LIU Minghui WANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4 ; pp. 401-410
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
H.264 encoding, VLSI architecture, region-of-interest, low power, 
 Summary | Full Text:PDF
Hardware Architecture for Fast Motion Estimation in H.264/AVC Video Coding
Myung-Suk BYEON Yil-Mi SHIN Yong-Beom CHO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/06/01
Vol. E89-A  No. 6 ; pp. 1744-1745
Type of Manuscript:  Special Section LETTER (Special Section on Papers Selected from 2005 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2005))
Category: 
Keyword: 
H.264 encoding, image compression, motion estimation, hardware architecture, 
 Summary | Full Text:PDF