Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C
No. 4 ;
pp. 555-563
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: Keyword: 0.5-V 25-nm 6-T SRAM cell, boosted word voltage, FD-MOSFETs, repair, worst design, |