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IEICE Trans

Keyword : CMOS SRAM

A CMOS SRAM Test Cell Design Using Selectively Metal-Covered Transistors for a Laser Irradiation Failure Analysis
Hiroshi HATANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/11/01
Vol. E95-C  No. 11 ; pp. 1827-1829
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
photocurrent induced failure, metal-covered transistor, CMOS SRAM, simulation, 
 Summary | Full Text:PDF
High-Speed CMOS SRAM Technologies for Cache Applications
Koichiro ISHIBASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6 ; pp. 724-734
Type of Manuscript:  INVITED PAPER (Special Issue on ULSI Memory Technology)
Category: Static RAMs
Keyword: 
CMOS SRAM, cache, wave-pipelined, sense amplifier, low-voltage, 
 Summary | Full Text:PDF