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| Keyword : network calculus
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Worst-Case Flit and Packet Delay Bounds in Wormhole Networks on Chip
Yue QIAN Zhonghai LU Wenhua DOU | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A
No. 12 ;
pp. 3211-3220
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword:
delay bounds, performance analysis, network calculus, network-on-chip, | | | Summary | Full Text:PDF | |
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