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IEICE Trans

Keyword : SPICE simulation

Equivalent Circuit Model for Simulating ESD Discharge Current in ESD Damage Test
Yusuke YANO Shoma ISHIHARA Hironori ITO Jianqing WANG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2025/09/01
Vol. E108-B  No. 9 ; pp. 1006-1014
Type of Manuscript:  Special Section PAPER (Special Section on Electromagnetic Compatibility in Conjunction with EMC Japan/APEMC Okinawa)
Category: 
Keyword: 
automotive Ethernet, common mode choke, ESD suppression device, ESD damage test, SPICE simulation, 
 Summary | Full Text:PDF
SPICE Behavioral Modeling of RF Current Injection in Wire Bundles
Flavia GRASSI Giordano SPADACINI Sergio A. PIGNARI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2014/02/01
Vol. E97-B  No. 2 ; pp. 424-431
Type of Manuscript:  PAPER
Category: Energy in Electronics Communications
Keyword: 
Bulk Current Injection (BCI), conducted immunity, behavioral modeling, SPICE simulation, 
 Summary | Full Text:PDF
PCB Plane Model Including Frequency-Dependent Losses for Generic Circuit Simulators
Jonghumn BAEK Yongjin JEONG Seokyoon KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/08/01
Vol. E87-C  No. 8 ; pp. 1388-1394
Type of Manuscript:  LETTER
Category: Electromechanical Devices and Components
Keyword: 
PCB plane modeling, SPICE simulation, skin effect, dielectric effect, ac loss, 
 Summary | Full Text:PDF
Voltage-Mode Multiple-Valued Logic Adder Circuits
Ioannis M. THOIDIS Dimitrios SOUDRIS Adonios THANAILAKIS 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6 ; pp. 1054-1061
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
multiple-valued logic, full adder, carry-lookahead adder, SPICE simulation, 
 Summary | Full Text:PDF
A Proposition on Floating Gate Neuron MOS Macromodeling for Device Fabrications
Tadahiro OCHIAI Hiroshi HATANO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A  No. 11 ; pp. 2485-2491
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
neuron MOS transistor, neuron MOS circuits, SPICE simulation, macromodel, 
 Summary | Full Text:PDF