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IEICE Trans

Keyword : PAM4

A Mueller-Müller CDR with False-Lock-Aware Locking Scheme for a 56-Gb/s ADC-Based PAM4 Transceiver
Fumihiko TACHIBANA Huy CU NGO Go URAKAWA Takashi TOI Mitsuyuki ASHIDA Yuta TSUBOUCHI Mai NOZAWA Junji WADATSUMI Hiroyuki KOBAYASHI Jun DEGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2024/05/01
Vol. E107-A  No. 5 ; pp. 709-718
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
baud-rate CDR, PAM4, false-lock-aware, phase adjustment, 
 Summary | Full Text:PDF
All-Optical PAM4 to 16QAM Modulation Format Conversion Using Nonlinear Optical Loop Mirror and 1:2 Coupler
Yuta MATSUMOTO Ken MISHINA Daisuke HISANO Akihiro MARUTA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2020/11/01
Vol. E103-B  No. 11 ; pp. 1272-1281
Type of Manuscript:  Special Section PAPER (Joint Special Section on Opto-electronics and Communications for Future Optical Network)
Category: 
Keyword: 
all-optical signal processing, modulation format conversion, nonlinear optical effect, NOLM, PAM4, 16QAM, 
 Summary | Full Text:PDF
DFE Error Propagation and FEC Interleaving for 400GbE PAM4 Electrical Lane
Yongzheng ZHAN Qingsheng HU Yinhang ZHANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2020/02/01
Vol. E103-C  No. 2 ; pp. 48-58
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
PAM4, DFE error propagation, FEC interleaving, BER, 400GbE, 
 Summary | Full Text:PDF