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IEICE Trans

Keyword : varied Karatsuba algorithm

Efficient Hybrid GF(2m) Multiplier for All-One Polynomial Using Varied Karatsuba Algorithm
Yu ZHANG Yin LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2021/03/01
Vol. E104-A  No. 3 ; pp. 636-639
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
varied Karatsuba algorithm, bit-parallel multiplier, all-one polynomial, redundant representation, 
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