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IEICE Trans

Keyword : unfolding

On Multiple-Voltage High-Level Synthesis Using Algorithmic Transformations
Lan-Rong DUNG Hsueh-Chih YANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12 ; pp. 3100-3108
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
multiple voltage scheduling, low-power circuit, loop shrinking, retiming, unfolding, high-level synthesis, 
 Summary | Full Text:PDF
A Concurrency Characteristic in Petri Net Unfolding
Chang-Hee HWANG Dong-Ik LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/04/25
Vol. E81-A  No. 4 ; pp. 532-539
Type of Manuscript:  Special Section PAPER (Special Section on Concurrent Systems Technology)
Category: 
Keyword: 
Petri nets, state space explosion, partial order semantics, unfolding, 
 Summary | Full Text:PDF
A Graph Theoretic Approach to Reachability Problem with Petri Net Unfoldings
Toshiyuki MIYAMOTO Sadatoshi KUMAGAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/11/25
Vol. E79-A  No. 11 ; pp. 1809-1816
Type of Manuscript:  Special Section PAPER (Special Section on Description Models for Concurrent Systems and Their Applications)
Category: 
Keyword: 
Petri net, occurrence net, unfolding, reachability problem, 
 Summary | Full Text:PDF