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IEICE Trans

Keyword : transistor count

Design Method for 2-Channel Signal Word Decomposed Filters with Minimum Output Error and Their Effective VLSI Implementation
Kouhei HOSOKAWA Mitsuhiko YAGYU Akinori NISHIHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/08/01
Vol. E88-A  No. 8 ; pp. 2044-2054
Type of Manuscript:  Special Section PAPER (Special Section on Papers Selected from the 19th Symposium on Signal Processing)
Category: Digital Signal Processing
Keyword: 
signal word decomposed filters, VLSI architecture, transistor count, 
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