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IEICE Trans

Keyword : test-per-clock

Seed Selection Procedure for LFSR-Based Random Pattern Generators
Kenichi ICHINO Ko-ichi WATANABE Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12 ; pp. 3063-3071
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Timing Verification and Test Generation
Keyword: 
BIST, LFSR, test-per-clock, test-per-scan, seed, polynomial, 
 Summary | Full Text:PDF