Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 56

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 192

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 192

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 192

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 192

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 202

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 271

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 271

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 271

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 271

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 271

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 296

Warning: Undefined array key "abst" in /var/www/02search_html/bin/keyword.php on line 315
IEICE Trans

Keyword : temperature scheduling


WSSA: A High Performance Simulated Annealing and Its Application to Transistor Placement
Shunji SAIKA Masahiro FUKUI Masahiko TOYONAGA Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2584-2591
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Layout Synthesis
Keyword: 
simulated annealingtemperature schedulingphase transitionplacement optimizationcell synthesis
 Summary | Full Text:PDF