IEICE Trans

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IEICE Trans

Keyword : stochastic logic

Hardware Implementation of an Inverse Function Delayed Neural Network Using Stochastic Logic Hongge LI Yoshihiro HAYAKAWA Shigeo SATO Koji NAKAJIMA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/09/01 Vol. E89-D No. 9 ; pp. 2572-2578 Type of Manuscript: PAPER Category: Biocybernetics, Neurocomputing Keyword: inverse function delayed model, associative memory, field programmable gate array (FPGA), stochastic logic,
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Implementation of Continuous-Time Dynamics on Stochastic Neurochip Shunsuke AKIMOTO Akiyoshi MOMOI Shigeo SATO Koji NAKAJIMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/09/01 Vol. E87-A No. 9 ; pp. 2227-2232 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: stochastic logic, nonmonotonic neuron, continuous-time dynamics, asynchronous updating, associative memories, traveling salesman problem, large scale integration (LSI) implementation,
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Single Electron Stochastic Neural Network Hisanao AKIMA Saiboku YAMADA Shigeo SATO Koji NAKAJIMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/09/01 Vol. E87-A No. 9 ; pp. 2221-2226 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: single electron transistor (SET), artificial neural network (ANN), stochastic logic, single electron random number generator,
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