A Timing-Driven Global Routing Algorithm with Pin Assignment, Block Reshaping, and Positioning for Building Block Layout Tetsushi KOIDEShin'ichi WAKABAYASHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/12/25 Vol. E81-ANo. 12 ;
pp. 2476-2484 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Layout Optimization Keyword: building block layout, global routing, pin assignment, timing constraint, simulated evolution,