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IEICE Trans

Keyword : sequential circuits

Signal Selection Methods for Debugging Gate-Level Sequential Circuits
Yusuke KIMURA Amir Masoud GHAREHBAGHI Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/12/01
Vol. E102-A  No. 12 ; pp. 1770-1780
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
logic debugging, engineering change order (ECO), sequential circuits, reachability analysis, 
 Summary | Full Text:PDF
A Method of Multiple Fault Diagnosis in Sequential Circuits by Sensitizing Sequence Pairs
Nobuhiro YANAGIDA Hiroshi TAKAHASHI Yuzo TAKAMATSU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/01/25
Vol. E80-D  No. 1 ; pp. 28-37
Type of Manuscript:  Special Section PAPER (Special Issue on Fault-Tolerant Computing)
Category: Testing/Checking
Keyword: 
sequential circuits, circuit level diagnosis, sensitizing sequence pairs, deduction algorithm, suspected/candidate faults, 
 Summary | Full Text:PDF
Improved Forward Test Generation of Sequential Circuits Using Variable-Length Time Frames
Yuzo TAKAMATSU Taijiro OGAWA Hiroshi TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/07/25
Vol. E76-D  No. 7 ; pp. 832-836
Type of Manuscript:  Special Section LETTER (Special Issue on VLSI Testing and Testable Design)
Category: 
Keyword: 
forward test generation, sequential circuits, variable-length time frames, state escaping, 
 Summary | Full Text:PDF