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IEICE Trans

Keyword : self-loop

Incorporation of Cycles and Inhibitory Arcs into the Timed Petri Net Model of Signaling Pathway
Yuki MURAKAMI Qi-Wei GE Hiroshi MATSUNO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/02/01
Vol. E96-A  No. 2 ; pp. 514-524
Type of Manuscript:  Special Section PAPER (Special Section on Mathematical Systems Science and its Applications)
Category: Concurrent Systems
Keyword: 
signaling pathway, timed Petri net, retention-free Petri net, self-loop, cycle, inhibitory arc, 
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