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IEICE Trans

Keyword : processor core

A Hardware/Software Cosynthesis System for Digital Signal Processor Cores with Two Types of Register Files
Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/03/25
Vol. E83-A  No. 3 ; pp. 442-451
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 12th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
hardware/software cosynthesis, processor core, digital signal processing, two types of register files, 
 Summary | Full Text:PDF
A Hardware/Software Cosynthesis System for Digital Signal Processor Cores
Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A  No. 11 ; pp. 2325-2337
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
hardware/software cosynthesis, hardware/software partitioning, processor core, digital signal processing, 
 Summary | Full Text:PDF