Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A
No. 4 ;
pp. 969-978
Type of Manuscript:
Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category:
Keyword:
low-density parity-check codes, partially-parallel LDPC decoder, message-passing algorithm, FPGA, |