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IEICE Trans

Keyword : parallel processor system

Evaluation of Shared DRAM for Parallel Processor System with Shared Memory
Hiroyuki KURINO Keiichi HIRANO Taizo ONO Mitsumasa KOYANAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A  No. 12 ; pp. 2655-2660
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: LSI Architecture
Keyword: 
multiport memory, shared memory, parallel processor system, DRAM, 
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