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IEICE Trans

Keyword : parallel execution

A Parallel Method to Extract Critical Areas of Net Pairs for Diagnosing Bridge Faults
Keiichi SUEMITSU Toshiaki ITO Toshiki KANAMOTO Masayuki TERAI Satoshi KOTANI Shigeo SAWADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A  No. 12 ; pp. 3524-3530
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
IDDQ, SoC, IFA, parallel execution, 
 Summary | Full Text:PDF