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IEICE Trans

Keyword : non-iterative

A Non-Iterative Method for Calculating the Effective Capacitance of CMOS Gates with Interconnect Load Effect
Minglu JIANG Zhangcai HUANG Atsushi KUROKAWA Qiang LI Bin LIN Yasuaki INOUE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/05/01
Vol. E94-A  No. 5 ; pp. 1201-1209
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
static timing analysis, gate delay, effective capacitance, non-iterative, 
 Summary | Full Text:PDF