Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/12/01 Vol. E87-ANo. 12 ;
pp. 3141-3150 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis Keyword: LUT cascade, LUT ring, multiple-output function, reconfigurable logic, programmable logic device,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-ANo. 12 ;
pp. 2693-2700 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis Keyword: shared binary decision diagram, SBDD, bi-partition, multiple-output function, decomposition,
Time-Division Multiplexing Realizations of Multiple-Output Functions Based on Shared Multi-Terminal Multiple-Valued Decision Diagrams Hafiz Md. HASAN BABUTsutomu SASAO