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IEICE Trans

Keyword : multi-level synthesis

AND/OR Reasoning Graphs for Determining Prime Implicants in Multi-Level Combinational Networks*
Dominik STOFFEL Wolfgang KUNZ Stefan GERBER 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/12/25
Vol. E80-A  No. 12 ; pp. 2581-2588
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
switching theory, multi-level synthesis, logic minimization, prime implicants, graph representation, AND/OR graphs, 
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