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IEICE Trans

Keyword : multi-level logic simplification

Robust Heuristics for Multi-Level Logic Simplification Considering Local Circuit Structure
Qiang ZHU Yusuke MATSUNAGA Shinji KIMURA Katsumasa WATANABE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2520-2527
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
multi-level logic simplification, satisfiability don't cares, observability don't cares, adaptive subnetwork, 
 Summary | Full Text:PDF