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Design of a Low Power Consumption Pulse-Shaping 1:4 Interpolation FIR Filter for W-CDMA Applications
Keun-Jang RYOO Jong-Wha CHONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A
No. 12 ;
pp. 2627-2630
Type of Manuscript:
Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: Analog Circuit Design
Keyword:
interpolation, FIR filter, lookup table, pulse-shaping, | | | Summary | Full Text:PDF | |
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A Depth-Constrained Technology Mapping Algorithm for Logic-Blocks Composed of Tree-Structured LUTs
Nozomu TOGAWA Koji ARA Masao YANAGISAWA Tatsuo OHTSUKI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/03/25
Vol. E82-A
No. 3 ;
pp. 473-482
Type of Manuscript:
Special Section PAPER (Special Section on Selected Papers from the 11th Workshop on Circuits and Systems in Karuizawa)
Category:
Keyword:
technology mapping, logic-block, lookup table, logic depth, | | | Summary | Full Text:PDF | |
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