Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2018/12/01
Vol. E101-A
No. 12 ;
pp. 2308-2319
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Keyword: hardware Trojans, gate-level netlist, steady state, signal transition, logic test, |