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IEICE Trans

Keyword : layout density

Density Optimization for Analog Layout Based on Transistor-Array
Chao GENG Bo LIU Shigetoshi NAKATAKE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/12/01
Vol. E102-A  No. 12 ; pp. 1720-1730
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
analog layout, manufacturability, layout density, transistor-array, 
 Summary | Full Text:PDF