A Method to Find Linear Decompositions for Incompletely Specified Index Generation Functions Using Difference Matrix Tsutomu SASAOYuta URANOYukihiro IGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2014/12/01 Vol. E97-ANo. 12 ;
pp. 2427-2433 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verification Keyword: minimal cover, linear transformation, functional decomposition, incompletely specified function, logic minimization,
BDD Representation for Incompletely Specified Multiple-Output Logic Functions and Its Applications to the Design of LUT Cascades Munehiro MATSUURATsutomu SASAO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-ANo. 12 ;
pp. 3332-3341 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis Keyword: AND-EXOR, Reed-Muller expression, FPRM, exact minimization, incompletely specified function,