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IEICE Trans

Keyword : gate model

New Gate Models for Gate-Level Delay Calculation under Crosstalk Effects
Tae Il BAE Jin Wook KIM Young Hwan KIM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A  No. 12 ; pp. 3488-3496
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
crosstalk, gate model, delay calculation, timing analysis, 
 Summary | Full Text:PDF