A High-Speed, Low-Power Phase Frequency Detector and Charge-Pump Circuits for High Frequency Phase-Locked Loops Won-Hyo LEESung-Dae LEEJun-Dong CHO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/11/25 Vol. E82-ANo. 11 ;
pp. 2514-2520 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: PFD, charge-pump, low power, PLL, high speed, D flip-flop, error detection range,