Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2009/05/01 Vol. E92-DNo. 5 ;
pp. 972-984 Type of Manuscript: Special Section PAPER (Special Section on Formal Approach) Category: Hardware Verification Keyword: high-level synthesis, behavioral synthesis, formal verification, equivalence checking,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-ANo. 12 ;
pp. 3315-3323 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Simulation and Verification Keyword: equivalence checking, C-based system level design, symbolic simulation, textual difference, program slicing,