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IEICE Trans

Keyword : design techniques

Multiplier Energy Reduction by Dynamic Voltage Variation
Vasily G. MOSHNYAGA Tomoyuki YAMANAKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3548-3553
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Circuit
Keyword: 
multiplier, energy reduction, design techniques, voltage scaling, 
 Summary | Full Text:PDF