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IEICE Trans

Keyword : data path allocation

An Optimal Block Terminal Assignment Algorithm for VLSI Data Path Allocation
Shoichiro YAMADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/03/25
Vol. E80-A  No. 3 ; pp. 564-566
Type of Manuscript:  Special Section LETTER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
block terminal assignment, data path allocation, high-level synthesis, integer linear programming, 
 Summary | Full Text:PDF
A Mathematical Formulation of Allocation and Floorplanning Problem in VLSI Data Path Synthesis
Shoichiro YAMADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/06/25
Vol. E77-A  No. 6 ; pp. 1043-1049
Type of Manuscript:  PAPER
Category: Computer Aided Design (CAD)
Keyword: 
high-level synthesis, data path allocation, floorplanning, mixed integer linear programming, 
 Summary | Full Text:PDF