A Coarse-Grain Hierarchical Technique for 2-Dimensional FFT on Configurable Parallel Computers Xizhen XUSotirios G. ZIAVRAS
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/02/01 Vol. E89-DNo. 2 ;
pp. 639-646 Type of Manuscript: Special Section PAPER (Special Section on Parallel/Distributed Computing and Networking) Category: Parallel/Distributed Algorithms Keyword: configurable computing, FPGA, SIMD, parallel processing, memory switching, FFT, hardware-software codesign,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/03/01 Vol. E85-ANo. 3 ;
pp. 591-599 Type of Manuscript: INVITED PAPER (Special Section on the Trend of Digital Signal Processing and Its Future Direction) Category: LSI/Signal Processors Keyword: configurable computing, reconfigurable computing, digital signal processing, FPGA,