Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2017/09/01 Vol. E100-ANo. 9 ;
pp. 1951-1955 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: computer arithmetic, cube roots, square roots, non-iterative root calculation,
Design of the Floating-Point Adder Supporting the Format Conversion and the Rounding Operations with Simultaneous Rounding Scheme Woo-Chan PARKCheol-Ho JEONGTack-Don HAN
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2002/08/01 Vol. E85-DNo. 8 ;
pp. 1341-1345 Type of Manuscript: LETTER Category: Computer System Element Keyword: computer arithmetic, floating-point unit, floating-point adder,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-ANo. 11 ;
pp. 2623-2631 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Design Keyword: computer arithmetic, SRT division, high-radix division, signed-digit number systems, VLSI,
A Digit-Recurrence Algorithm for Cube Rooting Naofumi TAKAGI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/05/01 Vol. E84-ANo. 5 ;
pp. 1309-1314 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: computer arithmetic, cube rooting, hardware algorithm, digit-recurrence algorithm, VLSI,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/06/25 Vol. E83-ANo. 6 ;
pp. 1106-1114 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1999 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC'99)) Category: Keyword: computer arithmetic, arithmetic circuits, CORDIC, VLSI, digital signal processing,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/09/25 Vol. E82-CNo. 9 ;
pp. 1687-1698 Type of Manuscript: Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms) Category: Configurable Computing and Fault Tolerance Keyword: computer arithmetic, redundant number systems, digital signal processing, FIR filter, FPGAs,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/05/25 Vol. E82-ANo. 5 ;
pp. 798-806 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: circuit design, computer arithmetic, arithmetic circuits, evolvable hardware, evolutionary computation,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/01/25 Vol. E82-ANo. 1 ;
pp. 173-177 Type of Manuscript: LETTER Category: Numerical Analysis and Optimization Keyword: computer arithmetic, division, FPU, error analysis, special-purpose,