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| Keyword : clock network synthesis
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Non-Uniform Clock Mesh Synthesis with Clock Gating and Register Clustering
Wei-Kai CHENG Jui-Hung HUNG Yi-Hsuan CHIU | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A
No. 12 ;
pp. 2388-2397
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
clock network synthesis, clock mesh, clock gating, | | | Summary | Full Text:PDF | |
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