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IEICE Trans

Keyword : circuit-level chips

Establishment of Reliability Model for Circuit-Level Chip Constant Stress Accelerated Degradation Data Based on Wiener Process
Shanyong CHEN Hanqing LUO Delin XU Liping LIANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2026/05/01
Vol. E109-A  No. 5 ; pp. 868-872
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
circuit-level chips, Wiener process, degradation model, lifetime prediction, 
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