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IEICE Trans

Keyword : cache memories

Fast Instruction Cache Simulation for Hardware/Software Co-Design
Marcello LAJOLO Luciano LAVAGNO Alberto SANGIOVANNI-VINCENTELLI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A  No. 11 ; pp. 2475-2484
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
cache memories, co-simulation, 
 Summary | Full Text:PDF