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A Reference Voltage Buffer with Settling Boost Technique for a 12 bit 18 MHz Multibit/Stage Pipelined A/D Converter
Shunsuke OKURA Tetsuro OKURA Toru IDO Kenji TANIGUCHI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/02/01
Vol. E92-A
No. 2 ;
pp. 367-373
Type of Manuscript:
Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category:
Keyword:
CMOS, pipelined ADC, settling, boost, low power, | | | Summary | Full Text:PDF | |
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