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IEICE Trans

Keyword : binary multiplier-accumulator

Design of a Multiplier-Accumulator for High Speed lmage Filtering
Farhad Fuad ISLAM Keikichi TAMARU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/11/25
Vol. E76-A  No. 11 ; pp. 2022-2032
Type of Manuscript:  PAPER
Category: VLSI Design Technology
Keyword: 
binary multiplier-accumulator, throughput, image filtering, VLSI architecture, 
 Summary | Full Text:PDF