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IEICE Trans

Keyword : biasing and sizing

On the Computational Synthesis of CMOS Voltage Followers
Esteban TLELO-CUAUTLE Delia TORRES-MUÑOZ Leticia TORRES-PAPAQUI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3479-3484
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Synthesis
Keyword: 
CAD, analog synthesis, voltage follower, nullator, norator, biasing and sizing, MOSFET, 
 Summary | Full Text:PDF