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IEICE Trans

Keyword : application specific DSP

Register Constraint Analysis to Minimize Spill Code for Application Specific DSPs
Tatsuo WATANABE Nagisa ISHIURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/06/01
Vol. E84-A  No. 6 ; pp. 1541-1544
Type of Manuscript:  Special Section LETTER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000))
Category: 
Keyword: 
application specific DSP, spill code insertion, embedded system, scheduling, register constraint analysis, 
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