Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A
No. 12 ;
pp. 2520-2527
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis Keyword: multi-level logic simplification, satisfiability don't cares, observability don't cares, adaptive subnetwork, |