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| Keyword : active leakage
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A Self-Alignment Row-by-Row Variable-VDD Scheme Reducing 90% of Active-Leakage Power in SRAM's
Fayez Robert SALIBA Hiroshi KAWAGUCHI Takayasu SAKURAI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C
No. 4 ;
pp. 743-748
Type of Manuscript:
Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Memory
Keyword:
active leakage, low power, SRAM, | | | Summary | Full Text:PDF | |
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Dynamic Sleep Control for Finite-State-Machines to Reduce Active Leakage Power
Kimiyoshi USAMI Hiroshi YOSHIOKA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A
No. 12 ;
pp. 3116-3123
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword:
leakage power, scaling, active leakage, burn-in, MTCMOS, | | | Summary | Full Text:PDF | |
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