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IEICE Trans

Keyword : X-architecture

Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement
Chia-Chun TSAI Chung-Chieh KUO Trong-Yen LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/02/01
Vol. E94-A  No. 2 ; pp. 706-716
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
clock routing, design for manufacturability, double via, X-architecture, 
 Summary | Full Text:PDF