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IEICE Trans

Keyword : VLSI layout optimization

Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing
Peng-Yang HUNG Ying-Shu LOU Yih-Lang LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/03/01
Vol. E92-A  No. 3 ; pp. 880-889
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
track routing, shield insertion, detailed routing, crosstalk optimization, global routing, VLSI layout optimization, 
 Summary | Full Text:PDF