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IEICE Trans

Keyword : Rate Distortion Optimization (RDO) VLSI architecture

Fast SAO Estimation Algorithm and Its Implementation for 8K×4K @ 120 FPS HEVC Encoding
Jiayi ZHU Dajiang ZHOU Shinji KIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12 ; pp. 2488-2497
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
high efficiency video coding, sample adaptive offset, Rate Distortion Optimization (RDO) VLSI architecture, 
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