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IEICE Trans

Keyword : Leverrier-Faddeeva algorithm

A Reduction Technique for RLCG Interconnects Using Least Squares Method
Junji KAWATA Yuichi TANJI Yoshifumi NISHIO Akio USHIDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/02/01
Vol. E88-A  No. 2 ; pp. 513-523
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
RLCG interconnects, Leverrier-Faddeeva algorithm, least squares method, passivity, asymptotic equivalent circuits, reduction, 
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