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IEICE Trans

Keyword : HDL generation

Synthesizable HDL Generation for Pipelined Processors from a Micro-Operation Description
Makiko ITOH Yoshinori TAKEUCHI Masaharu IMAI Akichika SHIOMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/03/25
Vol. E83-A  No. 3 ; pp. 394-400
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 12th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
pipelined processor, micro-operation description, HDL generation, instruction set processor, 
 Summary | Full Text:PDF