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IEICE Trans

Keyword : FPGA-based frame generator

A 3Gbps/Lane MIPI D-PHY Transmission Buffer Chip
Pil-Ho LEE Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/06/01
Vol. E102-A  No. 6 ; pp. 783-787
Type of Manuscript:  Special Section LETTER (Special Section on Circuits and Systems)
Category: 
Keyword: 
transmission buffer chip, LVDS, SLVS, MIPI D-PHY, FPGA-based frame generator, 
 Summary | Full Text:PDF
A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display
Ho-Seong KIM Pil-Ho LEE Jin-Wook HAN Seung-Hun SHIN Seung-Wuk BAEK Doo-Ill PARK Yongkyu SEO Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2017/11/01
Vol. E100-C  No. 11 ; pp. 1035-1038
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
transmitter bridge chip, MIPI D-PHY, DSI, FPGA-based frame generator, phase-locked loop, 
 Summary | Full Text:PDF